An Attempt at Face Detection on an SRC-6

Object detection is an important area of image processing. Specifically, face detection finds uses in image retrieval, surveillance, and many other applications. Because real-time processing may be desirable in some applications, it is useful to find fast algorithms and hardware that can perform this operation. One such algorithm for face detection that has proven to be fast is found in Intel’s Open Source Computer Vision Library (OpenCV) [1]. While the OpenCV face detection implementation works well, it still does not execute in real-time. In this work, we describe an attempt at implementing the same algorithm as used in OpenCV on an SRC-6 reconfigurable computer [2]. The SRC-6 MAP Series E processor is comprised of two FPGAs, which allows us to take advantage of parallelization and obtain increased performance from pipelined loops. These are two features commonly found in signal processing designs, so it was expected that this algorithm would execute faster on SRC-6. In the end, we found however that due to limitations on FPGA resources and the algorithm structure, the desired speedup was not achieved. However, this work has led to a better understanding of the algorithm structure and types of codes that work well on SRC-6.